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02/13/2024 - 02/13/2024 | Berlin

Wafer-level process technologies for SiC/GaN power electronics (Speaker: Dr. Piotr Mackowiak)

2# session of series »Powering the Future - Technologies for Power Electronics Modules with SiC and GaN Semiconductors«

The packaging of SiC/GaN devices faces new challenges that exceed the physical limits of silicon semiconductor devices. This expert session will give an insight into wafer level packaging technologies which empower WBG material.

Silicon carbide attracted great attention in the past. Beside superior SiC electrical properties, best suitable for converters used in electrical vehicles and for power conversion, it also shows great mechanical and especially thermal properties which make this material very attractive as a possible packaging material. Its thermal conductivity, which is between 350 W/mK (4H SiC) and 500 W/mK (6H SiC), is superior to other materials used for Fan-out wafer level packaging (FOWLP) application like EMC with around 0.7 W/mK. The thermal concept of the electronic package for high power devices needs to address the increased temperature of operation and the need to ensure the heat dissipation of the device. In common Fan-out packages, Epoxy Mold Compounds (EMC) are used which does not handle high temperature operations well since EMC has a low thermal conductivity.

This session covers wafer level packaging techniques making use of SiC. A manufacturing process for a SiC Fan-out wafer level package will be presented. This package consists of two SiC wafers (a SiC frame wafer and a SiC head spreader wafer) that are processed separately and bonded together in further step. Also, the high-power chip is embedded to form a package.

An approach of 3D integration making use of Though Silicon Carbide Vias (TSiCV) - similar to the well-established TSV process – is demonstrated in this session as well.

What to expect from our Experts Sessions
In our 45-minutes expert sessions we would like to present to you trending topics in a technical presentation. Afterwards, our experts will be available for your questions and comments and a joint discussion.

Next Dates & Topics:
13.2.: Wafer-level process technologies for SiC/GaN power electronics (Dr. Piotr Mackowiak)
27.2.: Highly reliable Interconnect Processes for Power Electronics (Dr. Matthias Hutter)
12.3.: Novel Integration Concepts for Power Electronics – PCB Embedding for SiC and GaN Semiconductors (Lars Böttcher)
26.3.2024 Reliability Challenges of Power Electronic Modules (Dr. Stefan Wagner)

More information and registration (free of charge!) you can find on our website:

Information on participating / attending:
Participation is free of charge, registration is required. This workshop series aims to address our customers, partners and interested parties from industry, politics and science.


02/13/2024 16:00 - 02/13/2024 16:45

Event venue:

MS Teams I Online
13355 Berlin

Target group:

Business and commerce, Scientists and scholars


transregional, national

Subject areas:

Electrical engineering

Types of events:

Seminar / workshop / discussion




Susann Thoma


Presse- und Öffentlichkeitsarbeit

Event is free:


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