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02/16/2026 08:06

Fraunhofer IPMS develops new 10G TSN endpoint IP Core for deterministic high-speed Ethernet networks

Anne-Julie Zichner Marketing & Kommunikation
Fraunhofer-Institut für Photonische Mikrosysteme (IPMS)

    The demand on Ethernet networks in automotive, industrial, and safety-critical applications is increasing rapidly: ever higher data rates must be combined with precisely predictable timing. The Fraunhofer Institute for Photonic Microsystems IPMS addresses this challenge with a new 10G TSN endpoint IP Core, enabling deterministic real-time communication at data rates of up to 10 Gbit/s.

    The new 10G TSN Endpoint (EP) is an addition to Fraunhofer IPMS's portfolio of Time-Sensitive Networking (TSN) IP Cores. It is designed for demanding applications that require maximum bandwidth, precise time synchronization, and reliable data transmission with exact timing. Compared to the previous 1G TSN IP Cores, the new 10G TSN EP IP Core enables a tenfold increase in data throughput, reaching up to 10 Gbit/s, while maintaining consistent, deterministic behavior throughout the network. Thus, it supports the development of next-generation real-time Ethernet networks.

    Precise time synchronization in the nanosecond range

    The new 10G TSN-EP IP Core is technically based on a robust, hardware-accelerated implementation of time synchronization according to IEEE 802.1AS-2020 (gPTP). This allows the core to achieve synchronization accuracies of less than 10 nanoseconds in Ethernet networks and ensures stable time bases, even at very high data rates. It supports key TSN standards, including IEEE 802.1Qav for audio/video traffic shaping, IEEE 802.1Qbv for time-controlled scheduling, IEEE 802.1Qci for per-stream policing, and IEEE 802.1CB (FRER) for redundant, fault-tolerant transmissions.

    Easy integration and a short time to market

    To facilitate rapid implementation, Fraunhofer IPMS provides powerful Linux driver packages and reference implementations. The latter cover native XGMII interfaces, as well as common 10G interfaces, such as 10G-BASE-R, SFI, and XFI. These interfaces are found on AMD Xilinx FPGAs, for example. The 10G TSN-EP IP Core is designed for a wide range of proven FPGA and ASIC target platforms, facilitating rapid integration into customer-specific designs.

    Wide range of applications

    In modern in-vehicle networks, the 10G TSN-EP IP Core acts as a deterministic backbone for domains such as advanced driver-assistance systems (ADAS), infotainment, and central computers. In sensor technology, the core enables low-loss and low-jitter data paths for video, radar, and lidar data, even during simultaneous multistream operation. In industrial automation, the core supports scalable, real-time networks for synchronized drives, robotics, and image processing lines. Predictable latency budgets across the entire network enhance the reliability and efficiency of complex production facilities.

    Kickoff for a New Generation of High-Speed TSN IP Cores

    "With our new 10G TSN endpoint, we are taking an important step in expanding our portfolio of TSN IP Cores and laying the foundation for a series of high-speed TSN IP Cores," says Alexander Noack, Division Director of Data Communication & Computing (DCC) at Fraunhofer IPMS in Dresden. "This will drive the development of a new generation of IP Cores for real-time, high-speed Ethernet networks, in which precise time synchronization is crucial — from automotive and industrial applications to aerospace and defense."

    As part of the CeCas funding project, Fraunhofer IPMS is developing a supercomputing platform for highly automated automobiles and testing 25G TSN solutions. In addition to the new 10G TSN-EP IP Core, a 10G TSN switched endpoint and a 10G TSN switch are in development and will be available later this year.


    Contact for scientific information:

    Stephan Kube, stephan.kube@ipms.fraunhofer.de


    Images

    Symbolic image 10G TSN endpoint
    Symbolic image 10G TSN endpoint

    Copyright: Fraunhofer IPMS

    Alexander Noack, Division Director Data Communication & Computing at Fraunhofer IPMS
    Alexander Noack, Division Director Data Communication & Computing at Fraunhofer IPMS

    Copyright: Fraunhofer IPMS


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    Symbolic image 10G TSN endpoint


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    Alexander Noack, Division Director Data Communication & Computing at Fraunhofer IPMS


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