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Before they ever hit the market, reliable microelectronic systems need to be subjected to lengthy and cost-intensive qualification tests. Coordinated by Fraunhofer IZM, a group of high-profile companies, research institutes, and universities is now working on ways to replace these tests with much faster, more flexible, and more economical simulations.
Qualification tests are indispensable when it comes to understanding how reliable newly developed microelectronic systems are. In order to conduct these tests, developers first need to construct a prototype and then subject it to many, often slow and laborious experiments. Any later tweaks to the design again have to be copied to the prototype, making the entire process expensive, slow, and not very accommodating to the changes and adjustments that happen naturally in a development project. There is an alternative that avoids these drawbacks: using simulations. However, the typical, detailed simulation techniques are suitable for use only with individual components, not entire assemblies. The data needed for realistic modeling is also normally not made available by the makers of components who are rightly worried about their intellectual property.
A new workflow for reliability simulations
With the launch of the „mikroVAL“ project, the ten partners from science and industry, coordinated by the Fraunhofer Institute for Reliability and Microintegration IZM, want to create a new workflow that brings together and aligns the different ways of simulating qualification tests. Their hope is that this new workflow can facilitate or potentially even remove the need for many of these tests.
Cutting-edge modeling principles like the so-called Reduced Order Modeling can avoid redundant work and speed up calculation without any compromise on the precision of the process. The intellectual property involved is even protected in the process, as the makers of the components and assemblies only need to share information about the interfaces and how they behave. The resulting package models can be reused and integrated in progressively more complex systems, a major innovation for simulating qualification tests. This is one of the reasons for why the simplified modeling of solder points plays a key role in the project.
There is one other aspect that is often missed by other attempts to simulate qualification procedures: The interactions between the microelectronic components and their housing, which has an essential effect on the reliability of systems. This factor is also covered by the new approach.
Going forward, the use of simulations promises to reduce the cost and effort needed to produce reliable microelectronics. It is an incentive for creating more durable and longer-lasting products, which can go a long way towards saving key resources.
Project mikroVAL
„mikroVAL“ was officially launched in early 2024 with a first meeting of the project partners.The project is scheduled to run from February 2024 to January 2028. It is supported by €1.88 million in federal funding from the Department of Education and Research as well as a further €420,000 from the industry partners on board: Hella GmbH, Robert Bosch GmbH, Siemens AG, BMW AG and Budatec GmbH. The project partners include, alongside Fraunhofer IZM, Fraunhofer IKTS, the Technical University of Dresden, the Technical University of Berlin and the Jade University of Applied Sciences.
Text: Steffen Schindler
Dr. Olaf Wittler l Environmental & Reliability Engineering I Telefon +49 30 46403-240 l olaf.wittler@izm.fraunhofer.de | Fraunhofer Institute for Reliability and Microintegration IZM | Gustav-Meyer-Allee 25 | 13355 Berlin l www.izm.fraunhofer.de
https://www.izm.fraunhofer.de/en/news_events/tech_news/mikroval.html
Cutting-edge simulation technology for faster and cheaper reliability checks for future microelectro ...
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